This invention relates to an electrostatic protection device and an electrostatic protection circuit used to prevent breakdown caused by static electricity.
In general, a semiconductor device is readily broken by static electricity. To this end, various protection devices (or elements) and a protection circuit including these protection devices are provided between an input/output pad connected to an external circuit and an internal circuit.
In particular, a gate insulating film of a MOS device is readily broken by the static electricity. Consequently, when excessive charges having a voltage higher than an operation voltage are generated by electrostatic discharge from the input/output pad in a MOS circuit, the excessive charges must be rapidly discharged to a ground before the operation voltage reaches a breakdown voltage of the gate insulating film in an internal CMOS circuit.
Under this circumstance, the static electricity can be easily discharged by forward characteristics of an n+p diode when a negative electrostatic discharge is applied to the input/output pad of the CMOS circuit.
However, when a positive electrostatic discharge is applied thereto, it is difficult to protect the gate insulating film by the use of the n+p diode.
Therefore, a parasitic bipolar transistor or a parasitic thyrister is generally and conventionally used as an effective electrostatic protection device.
Referring to FIGS. 1A and 1B, description will be made about a first related electrostatic protection circuit.
The first related electrostatic protection circuit uses a parasitic bipolar transistor, and a gate electrode G is grounded, as illustrated in FIG. 1A.
The first protection circuit can be widely used because a manufacturing process of n-MOSFETs of the internal CMOS circuit may be used.
In this event, the first electrostatic protection circuit illustrated in FIG. 1A is equivalent to a circuit in which a substrate resistor Rsub of a p-type semiconductor substrate 12 is connected to a base electrode B of an npn-type parasitic bipolar transistor 11.
A circuit diagram of the equivalent circuit is shown in FIG. 1A while current-voltage characteristics of the equivalent circuit are shown in FIG. 1B.
Herein, description will be made about a principle of electrostatic protection with respect to the first electrostatic protection circuit using the parasitic bipolar transistor.
When an excessive negative voltage generated by an electrostatic discharge is given to the input/output pad, the static electricity is discharged to the ground by the forward characteristics of an n+p junction between an n+ layer of an electrode S side and the p-type semiconductor substrate 12.
More specifically, a forward current If flows so as to discharge static electricity to the ground by exceeding an offset voltage Vos, as illustrated in FIGS. 1A and 1B.
In the meantime, when an excessive positive voltage generated by the electrostatic discharge is given to the input/output pad, the static electricity is discharged to the ground by snap-back characteristics for a reverse voltage.
In particular, as an applied voltage is increased, a reverse current Ir of the n+p junction is gradually increased, as shown in FIG. 1B. The reverse current Ir flows into the substrate resistor Rsub, and a potential of the base electrode B is increased by a voltage drop (15).
When the potential reaches a first trigger potential (Vt1, It1), the potential of the base electrode B is increased. Thereby, the npn-type parasitic bipolar transistor 11 is turned on. Herein, the n+p junction of the npn-type parasitic bipolar transistor 11 is almost broken down near the first trigger potential (Vt1, It1) in FIG. 1B.
Thereafter, a large current flows from the electrode S to an electrode D to discharge the static electricity to the ground (16).
When the applied voltage increases more, the current is also increased (17). Thereby, the npn-type parasitic bipolar transistor 11 is again broken down near a point of (Vt2, It2).
Consequently, the voltage is reduced while the current is increased (18). Finally, the devices are irreversibly changed by high-temperature heat are thereby broken (19).
Subsequently, description will be made about a second related electrostatic protection circuit.
The second related electrostatic protection circuit uses a parasitic thyrister 2 which is laterally directed, as illustrated in FIG. 2A.
An equivalent circuit of the second related electrostatic protection circuit is illustrated in FIG. 1C.
Such a circuit includes a lateral npn-type parasitic bipolar transistor 21, a vertical pnp-type parasitic bipolar transistor, a resistor Rnw of an n-well region, and a substrate resistor Rsub of a p-type semiconductor substrate 22, as illustrated in FIGS. 2A and 2C. Herein, the current-voltage characteristics of the equivalent circuit are shown in FIG. 2B.
The electrostatic protection principle of the second related electrostatic protection circuit using a parasitic thyrister is almost the same as the above-mentioned electrostatic protection principle of the first related electrostatic protection circuit using the parasitic bipolar transistor.
Specifically, when the excessive negative voltage generated by the electrostatic discharge is applied to the input/output pad, the static electricity is discharged to the ground by the forward characteristics of an n+p junction between an n+ layer of an electrode C side and the p-type semiconductor substrate 22.
Consequently, the forward current If flows so as to discharge the static electricity to the ground by exceeding the offset voltage Vos, as shown in FIG. 2B.
On the other hand, when the excessive positive voltage generated by the electrostatic discharge is given to the input/output pad, the static electricity is discharged to the ground by the snap-back characteristics for the reverse voltage.
That is, as the applied voltage is increased, the reverse current of the n+p junction is gradually increased, as illustrated in FIG. 2B. The reverse current flows into the substrate resistor Rsub, and the potential of the base electrode B is increased by a voltage drop (15xe2x80x2).
When the potential reaches a first trigger potential (Vt1, It1), the lateral npn-type parasitic bipolar transistor 21 is turned on by the increase of the potential of the base electrode B.
In consequence, the lateral thyrister 2 is turned on by a positive feedback operation of a pair of lateral and vertical transistors. Herein, it is to be noted that the n+p junction of the lateral npn-type parasitic bipolar transistor 21 is almost broken down near the first trigger potential (Vt1, It1) in FIG. 2B.
Thereby, a large current flows from an electrode A to an electrode K to discharge the static electricity to the ground (16xe2x80x2).
When the applied voltage is further increased, the current is also increased (17xe2x80x2), and the lateral npn-type parasitic bipolar transistor 21 is again broken down near a point of (Vt2, It2). Consequently, a voltage is reduced while a current is increased (18xe2x80x2) in FIG. 2B.
Finally, the device is irreversibly changed by high-temperature heat and is thereby broken (19xe2x80x2).
Meanwhile, the semiconductor device has been further reduced in size with micropatterning due to recent progress in technology. In the meantime, the semiconductor device becomes ever more sensitive with micropatterning. As a result, semiconductor devices are often broken by a low voltage.
In [the] recent years, the thickness of the gate insulating film of MOS devices has been thinned to about 4 nm, while the breakdown voltage of the gate insulating film has been reduced to about 7 V in CMOS devices which are super-micropatterned.
In the future, the micropatterning of semiconductor devices and the reduction in size of the devices will undoubtedly continue to advance.
Therefore, when the related electrostatic protection circuit is used in a compact semiconductor device which is reduced in size, the semiconductor device may be broken by the static electricity before the electrostatic protection circuit is operated (triggered).
In order to avoid such a problem, an electrostatic protection circuit having an operation voltage (trigger voltage) depending on a low breakdown voltage of the compact semiconductor device must be developed and produced.
However, even when the development and production of such devices have succeeded, the semiconductor device will continue to be further reduced in size. In consequence, a similar procedure or process will be repeated many times in the future.
It is therefore an object of this invention to provide an electrostatic protection device or circuit which is capable of effectively solving the various problems described above.
That is, it is a first object to efficiently decrease a trigger voltage of an electrostatic protection device or circuit.
More specifically, the first object is to provide an electrostatic protection device or circuit which operates at a low voltage, which is not higher than the breakdown voltage of the internal circuit, on the condition that the voltage falls within such a range that is not lower than the operation voltage of the internal circuit.
It is a second object to provide an economical electrostatic protection device or circuit which is capable of directly using a conventional manufacturing method of an electrostatic protection device or circuit without any changes.
It is a third object to provide an electrostatic protection device or circuit which is not self-broken by an increase of an applied voltage.
An electrostatic protection device according to this invention includes a parasitic bipolar transistor and a trigger device.
In this case, the trigger device is provided adjacent to the parasitic bipolar transistor and injects charges generated by static electricity into a base region of the parasitic bipolar transistor.
Thus, the trigger device injects the charges generated by the static electricity into the base region of the parasitic bipolar transistor. Consequently, the operation voltage (namely, trigger voltage) of the parasitic bipolar transistor advantageously is effectively reduced.
Further, the trigger device has an insulating film. In this condition, the charges generated by the static electricity are passed through the insulating film by a tunnel effect, and are injected into the base region of the parasitic bipolar transistor.
Thereby, the charges are shielded by the insulating film of the trigger device at a low voltage. On the other hand, the charges are passed by the tunnel effect at a high voltage to flow into the base electrode of the parasitic bipolar transistor.
In consequence, a waste current does not flow to the ground in a normal state in which an electrostatic discharge does not occur. In the meantime, the excessive charges generated by the static electricity advantageously flow to the ground only in a dangerous state in which electrostatic discharge takes place.
Further, a gate electrode is formed on a semiconductor substrate via a gate insulating film. Moreover, a device isolation layer is formed on the semiconductor substrate of the peripheral portion of the gate electrode.
With such a structure, an increase of a voltage Vox applied to the gate insulating film is suppressed before the gate insulating film is broken. Consequently, the gate insulating film can be advantageously prevented from being broken.
Herein, description will be made about this principle with reference to FIGS. 4A and 4B.
A trench as a device isolation layer is formed. Thereby, the number of minority carriers collected to an inversion layer 41 on a surface of the semiconductor substrate becomes low (namely, the minority carriers are short). In consequence, a depletion layer 42 must be extended to compensate for the shortage of the minority carriers.
In order to extend the depletion layer, even if the voltage applied to the gate electrode is increased from a certain value to be higher than the certain value, the increase of the voltage is used for an increase of a voltage applied to the semiconductor substrate from a voltage Vs1 to Vs2, and is not used for an increase of a voltage Vox applied to the gate insulating film.
In this event, the voltage Vox applied to the gate insulating film is saturated, and a tunnel current depending on the voltage Vox and passing through the gate insulating film is also saturated.
In order to enhance the tendency of the shortage of minority carriers collected to the inversion layer 41, the trench may be filled in with insulators, such as SiO9.
In place of the trench, a semiconductor region having a polarity opposite to the polarity of the semiconductor substrate may be formed.
In the capacitor device, a low-resistance layer is preferably formed in the semiconductor substrate.
Thereby, the voltage applied to the gate insulating film before the gate insulating film is broken is suppressed from increasing.
As a result, the gate insulating film can be advantageously prevented from being broken.
Further, a tunnel current passing through the gate insulating film can be induced along the low-resistance layer.
Consequently, concentration of the tunnel current can be effectively adjusted at a single point. Further, diffusion of the tunnel current into a predetermined region can be advantageously adjusted.
Moreover, the capacitor device preferably has a diode connected in parallel to the gate electrode.
After the diode is broken down, the reverse current of the diode and the tunnel current are effectively added to each other to flow into the semiconductor substrate.
In the electrostatic protection device, the parasitic bipolar transistor is triggered by injecting trigger currents of one or more trigger devices. In consequence, a decrease in operation voltage (namely, a trigger voltage) of the parasitic bipolar transistor depending on the characteristics of the specific trigger elements can be advantageously achieved.
Further, the parasitic bipolar transistor and the trigger device are arranged such that an adjacent area of the parasitic bipolar transistor and the trigger device is increased.
When the parasitic bipolar transistor and the trigger device are close to each other, the trigger current can be accurately and readily injected into the base electrode of the parasitic bipolar transistor. In consequence, a waste current is advantageously prevented from flowing.
The semiconductor device according to this invention is strong against static electricity because its internal circuit is protected by the electrostatic protection circuit.